NASDAQ: GSIT

GSI TECHNOLOGY INC

CIK 0001126741 · Semiconductors

GSI provides in-place associative computing solutions for applications in high growth markets such as artificial intelligence (“AI”) and high-performance computing (“HPC”), including natural language processing and computer vision. Our associative processing unit (“APU”) family of products are… About this business →

8-K Filed May 28, 2026 · Period ending May 26, 2026

GSI Technology sets exec bonuses tied to SRAM and APU revenue targets for fiscal 2027

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8-K Filed May 22, 2026 · Period ending May 7, 2026

GSI Technology reports preliminary FY2026 revenue of $25.1M with 54.5% gross margin

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8-K Filed May 7, 2026 · Period ending May 7, 2026

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8-K Filed Mar 18, 2026 · Period ending Mar 12, 2026

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10-Q Filed Feb 6, 2026 · Period ending Dec 31, 2025

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8-K Filed Jan 29, 2026 · Period ending Jan 29, 2026

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10-Q Filed Nov 7, 2025 · Period ending Sep 30, 2025

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10-K Filed Jun 18, 2025 · Period ending Mar 31, 2025

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10-K Filed Jun 13, 2024 · Period ending Mar 31, 2024

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About GSI TECHNOLOGY INC

Source: Item 1 (Business) from the 10-K filed June 18, 2025. Description as filed by the company with the SEC.

Item 1. Business

Overview

GSI provides in-place associative computing solutions for applications in high growth markets such as artificial intelligence (“AI”) and high-performance computing (“HPC”), including natural language processing and computer vision. Our associative processing unit (“APU”) family of products are focused on applications using similarity search and Boolean processing. Similarity search is very efficient for large database search queries. The APU utilizes this technique to provide large scale search coverage in a small, low power footprint for ecommerce, computer vision, drug discovery, cyber security and service markets such as NoSQL, Elasticsearch, and OpenSearch. Our extensive historical experience in developing high speed synchronous static random access memory, or SRAM, facilitated our ability to transform the focus of our business to the development of reliable hardware AI products and solutions.

Even as we expand our offering of in-place associative computing solutions, we continue to be committed to the synchronous SRAM market, by making available exceedingly high density performance memory products for incorporation into test and measurement applications and high-performance networking and telecommunications equipment, such as routers, switches, wide area network infrastructure equipment, wireless base stations and network access equipment. Our position in the synchronous SRAM market is well established and we have long-term supplier relationships with many of the leading original equipment manufacturer, or OEM, customers including KYEC and Nokia. The revenue generated by these sales of high-speed synchronous SRAM products is being used to finance the development of in-place associative computing solutions and new types of SRAM products. We also serve the ongoing needs of the military/defense and aerospace markets by offering robust high-quality radiation-tolerant and radiation-hardened space grade SRAMs in addition to in-place associative computing solutions for the military/defense and aerospace markets such as synthetic aperture radar (“SAR”) image processing.

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We utilize a fabless business model for the manufacture of our APU and SRAM products, which allows us both to focus our resources on research and development, product design and marketing, and to gain access to advanced process technologies with only modest capital investment and fixed costs.

GSI’s fiscal year 2025 net revenue decreased by 6% compared to net revenue in fiscal year 2024, reflecting cautionary spending by our customers and fewer purchases made as a result of worldwide inflationary pressures,

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higher interest rates, increasing geopolitical tensions and decline in the global economic environment, all of which resulted in reduced demand for our SRAM products. GSI’s gross margin decreased by 4.9% compared to the prior fiscal year primarily due to product mix and the effect of lower revenue on the fixed costs in our cost of revenues as well as severance related payments related to our August 2024 cost reduction initiative.

In June 2023, we announced the receipt of an award of a prototype agreement with the Space Development Agency for the development of a Next-Generation Associative Processing Unit-2 (“APU2”) for Enhanced Space-Based Capabilities. Our next-generation non-Von-Neumann Associative Processing Unit compute in-memory integrated circuit (“IC”) offers unique capabilities to address the challenges faced by the United States Space Force in processing extensive sets of big data in space. Our overarching objective is to enable and enhance current and future mission capabilities through the deployment of compute in-memory integrated systems that can efficiently handle vast amounts of data in real-time at the edge. The APU, featuring a scalable format, compact footprint, and low power consumption, presents an ideal solution for edge applications where prompt and precise responses are crucial. These capabilities empower the U.S. Space force to swiftly detect, warn, analyze, attribute, and forecast potential and actual threats in space, ultimately bolstering the ability of the United States to maintain and leverage space superiority. The U.S. Space Force is actively seeking solutions to address current limitations in processing big data that is needed to execute the mission objectives of the Space Development Agency within the evolving and challenging space environment. This award is funded by the Small Business Innovation Research program, a competitive program funded by various U.S. government agencies, that encourages small businesses to engage in federal research and development with the potential for commercialization. Under the terms of this Direct to Phase II award, we are developing an advanced non-Von-Neumann Associative Processing Unit-2, compute in-memory IC, and design and fabricate an APU2 Evaluation Board. Pursuant to an agreed-upon schedule, we are to receive milestone payments totaling an estimated $1.25 million upon the successful completion of predetermined milestones, of which $435,000 was received in fiscal 2024 and $318,000 was received in fiscal 2025.

In January 2024, we announced that GSI was selected by AFWERX the innovation arm of the U.S. Department of the Air Force for an SBIR Direct-to-Phase II contract in the amount of $1.1 million to demonstrate high-data computation use cases leveraging the distinct compute in-memory architecture of our APU2. We are creating specialized algorithms for the U.S. Air Force Research Laboratory (“AFRL”) to leverage the compute-in-memory architecture of the Gemini® APU. This chip is designed for various AI applications to tackle key challenges in the Department of the Air Force, including in-aircraft search and rescue, object detection, moving target indication, change detection, and structural similarity index measure (“SSIM“) in GPS-absent situations. We are also developing algorithms using data from the U.S. Space Force to showcase the performance benefits of our compute-in-memory APU2 integrated circuit. We will receive milestone payments totaling an estimated $1.1 million upon the successful completion of predetermined milestones, of which $157,000 was received in fiscal 2025.

In January 2025, we announced that GSI has been selected by the U.S. Army for a potential contract award of up to $250,000 under the Department of Defense SBIR program. The contract represents a significant opportunity for GSI to develop advanced, Army-specific edge computing AI solutions using our groundbreaking Gemini-II technology. The project will focus on two critical objectives that showcase the potential of our innovative architecture. First, we will determine the feasibility of integrating Gemini-II with AI models specifically tailored for the Army’s edge computing needs. This determination will involve a comprehensive assessment of operational challenges, optimization with the Gemini-II architecture, and establishing key performance metrics through detailed customer discovery and technical specifications for edge AI development. The second objective centers on identifying and validating the most suitable AI algorithms for the Gemini-II platform. We will conduct in-depth research to select efficient edge AI models, develop a detailed integration plan, and evaluate performance metrics for low-latency and high-throughput applications of value in military environments. Particularly noteworthy is the project’s focus on developing 1-bit Large Language Models (LLMs) for the U.S. Army that maintain high accuracy while providing exceptionally low power consumption and minimal latency. This innovation not only promises to

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benefit warfighters but also presents compelling application opportunities across multiple dual-use markets, including complex computer vision recognition, autonomous vehicle navigation and mobile data computation. There have been no payments received under this award as of March 31, 2025.

Our APU technology is implemented in a series of Gemini AI chips. Gemini-I is in full production. We are marketing specific differentiated applications and APIs as-a-Service adding Amazon Web Services, Azure, or Google Cloud Storage users to our customer base along with those that want on-prem or to build embedded edge products. We support customers with prebuilt APIs and libraries to support their parallel programming of the Gemini-I. The software stack accelerates development by providing an integrated framework environment for the compute-in-memory as well as host and management code modules. Our compiler stack framework allows customers to optimize their applications by editing APIs provided by GSI, or write their own APIs.

In January 2024, we received first silicon for our second -generation Gemini-II chip. Testing has been proceeding well and we are looking forward to bringing our Gemini-II product with an order of magnitude improved performance to the general market in mid-calendar 2025. We have begun benchmarking and are working to support the Gemini-II with a python supported compiler this year.

In March 2025, we secured an initial production order for our radiation-hardened SRAM from a North American prime contractor, with follow-on orders expected in fiscal 2026. This sale carries a significantly higher gross margin than our traditional SRAM chips. In parallel, we are actively pursuing heritage status for this chip, which will improve our market readiness and open important new sales channels.

We were incorporated in California in 1995 under the name Giga Semiconductor, Inc. We changed our name to GSI Technology in December 2003 and reincorporated in Delaware in June 2004 under the name GSI Technology, Inc. Our principal executive offices are located at 1213 Elko Drive, Sunnyvale, California, 94089, and our telephone number is (408) 331-8800.

Recent Developments

Sale/Leaseback of Headquarters

On June 6, 2024, we completed a sale and leaseback transaction pursuant to a previously executed purchase and sale agreement (the “Agreement”) with an unrelated party, as purchaser, for the sale of our 1213 Elko Drive property in Sunnyvale, California (the “Sunnyvale Property”) for a purchase price, net of closing and other expenses payable of $11.2 million in cash. Concurrent with the sale, we entered into a lease agreement (the “Lease”) to lease all of the Sunnyvale Property that we occupied from the purchaser for an initial term of ten years from the closing of the sale of the Sunnyvale Property. We have the option to renew the term of the Lease for two additional five-year periods. Pursuant to the Lease, we are responsible for base rent initially at a rate of approximately $90,768 per month and the monthly operational expenses, such as maintenance, insurance, property taxes and utilities. The rental rate will increase three percent (3%) per year beginning on the first anniversary of the closing. The transaction was accounted for as a sale and leaseback and operating lease accounting classification. We recorded a gain of $5.7 million in the gain from sale of assets in the Consolidated Statements of Operations in the quarter ended June 30, 2024.

Exploring Strategic Alternatives

In May 2024, we announced that we had initiated a broad strategic review to maximize stockholder value. The review is being administered by a special committee of the Board of Directors to bring focus on strategic alternatives while our management focuses on the development of our family of compute in memory solutions for high performance computing and Artificial Intelligence. We are considering a wide range of options including

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equity or debt financing, divestiture of assets, technology licensing or other strategic arrangements including the sale of GSI. As part of the strategic review process, we hired Needham & Company, LLC, as our strategic and financial advisor. There can be no assurance that the review process will result in any strategic alternative, or as to its outcome or timing. We have neither set a timetable for completion of this process, nor have we made any decisions related to strategic alternatives at this time.

Industry and Market Strategy

Associative Processing Unit Computing Market Overview

The markets for associating processing computing solutions are significant and growing rapidly. The total addressable market (“TAM”) for APU search applications, which is the market where GSI is focusing its commercialization efforts, has been determined by GSI to be approximately $247 billion in 2025, and growing at a compound annual growth rate (“CAGR”) of 27% to $708 billion by 2028. GSI has similarly determined that the Serviceable Available Market (“SAM”) for APU search applications is approximately $7.3 billion in 2025, and anticipated to grow at a CAGR of 18% to $12.4 billion by 2028. The search market segments included in GSI’s TAM and SAM analyses include vector search and HPC. Market applications in these segments include search and retrieval in various fields and synthetic aperture radar in research and aerospace and defense.

The growth in demand for associative processing computing solutions is being driven by the increasing market adoption and usage of graphics processing unit (“GPU”) and CPU farms for AI processing of large data collections, including parallel computing in scientific research. However, the large-scale usage of GPU and CPU farms for AI processing of data is demonstrating the limits of GPU and CPU processing speeds and resulting in ever higher energy consumption. The amounts of data being processed, which is coming from increasing numbers of users and continuously increasing amounts of collected data, has resulted in efforts to split and store the processed data among multiple databases, through a process called sharding. Sharding can substantially increase processing costs and worsen the power consumption factors associated with processing so much data if the underlying architecture is inefficient to begin with.

Our APU has been demonstrated to outperform CPUs and GPUs in the market for AI search of large data collections by providing lower latency and increased capacity in a smaller form-factor and achieve such results with lower power consumption. In addition, our compute-in-place technology has wide application. The APU has several benefits that are particularly useful to overcome the high power challenges of GPUs. First, the APU does not have the word size limitation of traditional CPU and GPU processors. Because traditional data processors move data around to various parts of a system, they need to select or duplicate resources of particular word sizes, be they 8-bit, 16-bit, 32-bit or 64-bit. The APU is based on a memory line structure, which means that it can operate on legacy instruction widths of 8 or 16-bits, or just as seamlessly operate on instructions of arbitrary widths of 1 bit, 768-bits or 2048-bits. APUs can operate on any word width at interim processing steps. This dynamic flexibility is a tremendous advantage for non-linear processing used in high performance compute workloads. Second, the APU is also an associative machine, which means that data that is resident in the device can be applied to a function only if it is deemed associated (for example, with a meta-tag) to the processing. Such processing is like a person looking for his car in a parking lot, but ignoring all cars that are not the color of his car. An additional benefit of the Gemini APU designs is that they are multi-threaded. One sensor or query input can be simultaneously applied to multiple functions or searches in the device.

Our associative computing technology utilizes in-memory associative processor structures to address the bottlenecks that limit performance and increase power consumption in CPUs, GPUs, and Field Programable Gate Arrays (“FPGAs”) accelerators when processing large datasets. By constantly having to move operands and results in and out of devices with ever increasing processing speeds and bus speeds, current solutions are focused on memory transfers rather than addressing the basic computation problem. By changing the computational framework

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to parallel processing and having search functions conducted directly in a processing memory array, the APU can greatly expedite computation and response times in many “big data” applications. We are creating a new category of computing products that are expected to have substantial target markets and a large new customer base in those markets.

Our commercialization efforts for the APU product are focused on markets where the APU shows factors of improvement against CPU or GPU systems. The APU differentiates itself most for similarity search, multi-modal vector search, real-time very large database search, and several scientific high-performance computing-workloads processing sensor data. The APU’s improved performance over CPU or GPU systems provides a paradigm-shifting ability to process data in real-time. As a result, we see applications for the APU in artificial intelligence applications, including approximate nearest neighbor searches, cryptography, and synthetic aperture radar as well as other fields whose processing can benefit from the APU’s smaller footprint, superior productivity, and low system power consumption. GSI has solutions to accelerate multimodal vector search as an on-prem or SaaS solution for OpenSearch and general Fast Vector Search, and for processing large area SAR images in real-time at high resolution.

Similarity search uses a technique called distance metric learning, in which learning algorithms measure how similar related objects are to each other. The APU is well suited for very fast similarity search because its design determines distance metric at fast computation speeds with high degrees of accuracy. Our APU is further differentiated from other solutions in the market by its scalability for very large datasets. The APU has demonstrated its ability to increase the rate of computation for visual search by orders of magnitude with greater accuracy and reduced power consumption. The APU also adds multi-modal search capability to this computational performance. For instance, the ability to search on a picture of a product on an ecommerce website, with pricing and specific filters, does not impede the performance of the in-memory search versus a traditional text only search. This kind of performance has the potential to transform online retailers’ capabilities to run search queries and improve customers’ online shopping experience.

As we continue our efforts to simplify use of the Gemini devices in the markets discussed, we also see opportunities in the edge applications of these markets. In the edge segment the high power and small database coverage of single GPUs is not suitable. While some edge products are coming to market, they do not have the capacity to provide large database support. The APU capabilities and the larger capacity of the Gemini-II chip are well suited for this growing segment. In an attempt to address greater density in processed data, the market is working to reduce bit widths used in models. As the APU technology is ideally suited for smaller bit widths, and including even 1-bit, we are undertaking an effort to adopt several AI models to 1-bit and ternary (1.58-bit) optimization for Gemini-II application. We see this effort as furthering the density and value of our parts for the edge market.

New Markets for the APU

The APU is capable of processing large data arrays in a cost competitive solution for large database similarity search, but the mathematical capabilities of the APU also create new opportunities in real-time processing. Examples of real-time processing are SAR, image re-registration, and mathematical SSIM. This combination of sensor processing, image processing, and computer vision at high performance has the potential to bring application processing that normally requires several resources in a data center to real-time edge applications. Examples are in-asset aircraft reconnaissance, satellite image processing, and autonomous automotive navigation. Furthermore, GSI’s expertise in developing radiation-tolerant components creates new opportunities in the growing market for AI products that can be used in low earth orbit and space applications, where other AI products are not able to survive the harsh environment.

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The expanding use of ChatGPT and its competitors has brought the market for AI search to the forefront of consumer awareness. Applications using ChatGPT for natural language processing can directly apply the GSI APU technology to reduce hallucinations through the use of the technology for focused retrieval augmented generation improving speed and accuracy of specialized search applications.

For even smaller footprint applications such as satellites or networking blades, GSI will license the intellectual property (“IP”) underlying the APU to companies that have their own chip design capabilities to incorporate GSI’s IP into their custom products, and provide design services to help integrate the IP into new processor, FPGA, or ASIC designs.

APU Board Level Product

The Gemini-I APU is currently in production as a full-size PCIe card and a 1U E1.L card. These are the Leda-E and Leda-S, respectively. We are shipping samples of Gemini-II in a full-size PCIe card called the Leda-E2.

The Leda-S E1.L form factor enables the use of market standard SSD rack enclosures to build a dense APU compute appliance unachievable by GPU cards that require specialized connectivity for expansion. GSI has off-the-shelf server product offerings with 8 Leda-E cards in a single 2U server providing 10 POPS of Boolean operation, and a single 1U server with 16 Leda-S cards providing 15 POPs of Boolean performance. A single LEDA-S can be used without the need for a host PC in some applications so that, as an example, it can be packaged in a compact case for quad-copter use. It can also be used in small appliances for location recognition, object recognition, and GPS-denied alternate routing useful for drone product delivery or reconnaissance applications.

APU SaaS Product

We also offer commercialized APU as-a-service. This service offering runs on servers in a datacenter that have a direct connection to Amazon Web Services. Customers can access the APU via the Amazon Web Services Cognito user identity and data synchronization service for GSI-packaged SaaS applications, or for customers’ own custom APU-accelerated applications. The cloud connected cards in this datacenter are also connected via the same ultra-low latency system to provide approximate nearest neighbor (“ANN”) and multi-modal extension capability to OpenSearch. We envision customers who use OpenSearch for their database storage would use our SaaS product to accelerate searches run on OpenSearch. Customers who are building their own search engines for special use case products could use our SaaS product to support high volume searches run on their products. GSI also offers our SAR processing as a SaaS product that can be used by mapping and analysis services to scale, speed up, and enhance their own product offerings.

APU Commercialization Risk

Sales of APU products continue to be in the research and academic areas and our commercialization efforts have taken much longer than anticipated to gain traction. If we fail to materially commercialize our APU products, we may not generate sufficient revenues to offset our development costs and other expenses, which will have an adverse impact on our business including a potential impairment of intangible assets and a negative impact on our market capitalization.

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High-Speed Synchronous SRAM Market Overview

High-speed synchronous SRAMs are incorporated into networking and telecom equipment, military/defense and aerospace applications, audio/video processing, test and measurement applications, medical and automotive applications, and other miscellaneous applications. The networking and telecom market demand for high-speed synchronous SRAMs has been declining, and is expected to continue to decline, due to the industry trend of embedding greater amounts of SRAM into each generation of ASICs/controllers products, thereby reducing the need for external SRAMs. As a result, the demand for external high-speed synchronous SRAMs in new end-products is being driven by markets such as military/defense and aerospace applications. Such applications require a combination of high densities and high random transaction rates that GSI is well positioned to serve, being the only SRAM manufacturer to offer monolithic 288Mb densities as well as offering the highest truly random transaction rate in the industry – 1866 million transactions per second (MT/s). To further serve the military/defense and aerospace markets, GSI has been focusing on qualifying its products for space/satellite applications to capitalize on opportunities resulting from the development of near-earth orbiting satellite mega constellations, as well as the more traditional geo-stationary earth orbit satellite communication platforms and national assets.

High-Speed Synchronous SRAM Products

We offer four families of high-speed synchronous SRAMs – SyncBurst™, NBT™, SigmaQuad™, and SigmaDDR™. All four SRAM families feature high density, high transaction rate, high data bandwidth, low latency, and low power consumption. These four product families provide the basis for approximately 10,000 individual part numbers. They are available in several density and data width configurations, and are available in a variety of performance, feature, temperature, and package options. Our products can be found in a wide range of networking and telecommunications equipment, including routers, universal gateways, fast Ethernet switches and wireless base stations. We sell our products to defense contractors that manufacture products for military/defense and aerospace applications such as radar and guidance systems and satellites. We also sell our products to OEMs for test and measurement applications such as burn-in chambers, high-speed testers, high performance computing applications such as high volume trading, and for medical applications such as ultrasound and CAT scan equipment.

We have introduced and are marketing radiation-hardened, or “RadHard”, and radiation-tolerant, or “RadTolerant”, SRAMs for military/defense and aerospace applications such as networking satellites and missiles. Our initial RadHard and RadTolerant products are 288 megabit, 144 megabit, and 72 megabit devices from our SigmaQuad-II+ family. We have also expanded our product offerings to include 144 megabit, 72 megabit, and 32 megabit SyncBurst and NBT SRAMs RadTolerant products to enable the avionics and other space platforms that have historically leveraged smaller asynchronous devices. The RadHard products are offered in two package options: a hermetically-sealed ceramic column grid array package, and standard plastic packaging. These devices undergo a special fabrication process that diminishes the adverse effects of high-radiation environments.

SRAM Leadership in the High Performance Memory Market

We endeavor to address the overall needs of our SRAM customers, not only satisfying their immediate requirements for our latest generation, highest performance networking memory, but also providing them with the ongoing long-term support necessary during the entire lives of the systems in which our products are utilized. Accordingly, the key elements of our SRAM solution include:

●Product Performance Leadership. Through the use of advanced architectures and design methodologies, we have developed high-performance SRAM products offering superior high speed performance capabilities and low power consumption, while our advanced silicon process technologies allow us to optimize yields, lower manufacturing costs and improve quality.

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●Product Innovation. We believe that we have established a position as a technology leader in the design and development of Very Fast SRAMs. We are believed to have the industry’s highest density RadHard SRAM, the SigmaQuad-II+, which is an example of our industry-leading product innovation.

●Broad and Readily Available Product Portfolio. We have what we believe is the broadest catalog of Very Fast SRAM products.

●Master Die Methodology. Our master die methodology enables multiple product families, and variations thereof, to be manufactured from a single mask set so that we are able to maintain a common pool of wafers that incorporate all available master die, allowing rapid fulfillment of customer orders and reducing costs.

●Customer Responsiveness. We work closely with leading networking and telecommunications OEMs, as well as their chip-set suppliers, to anticipate their requirements and to rapidly develop and implement solutions that allow them to meet their specific product performance objectives.

Business Transformation Strategy

Our objective is to market and sell transformative new products utilizing our cutting-edge in-place associative computing technology in high growth markets, while continuing to profitably increase our share of the external SRAM market. Our strategy includes the following key elements:

●Complete productization of our In-place Associative Computing products. Our principal operations objective is the completion of productization efforts for our in-place associative computing products.

●Identifying and developing new long tail markets where the APU is differentiated. Realization of this goal will require additional development and marketing efforts in calendar 2025. Our initial focus is in the markets for artificial intelligence and high-performance computing, including natural language processing, computer vision and cyber security with a focus in this area being for similarity search applications including facial recognition, drug discovery and drug toxicity, signal and object detection and cryptography.

●Identify opportunities and rapidly increase sales of RadHard and RadTolerant SRAMs. We continue to aggressively target the military/defense and aerospace markets with our RadHard and RadTolerant devices. We plan to continue expansion into the military/defense and aerospace markets with our APU platform that has shown design robustness.

●Exploit opportunities to expand the market for our SRAM products. We are continuing the expansion of sales of our high-performance SRAM products in the military, industrial, test and measurement, and medical markets and intend to continue penetrating these and other new markets with similar needs for high-performance SRAM technologies.

●Collaborate with wafer foundry to leverage advanced process technologies. We will continue to utilize complementary metal-oxide semiconductor fabrication process technologies from Taiwan Semiconductor Manufacturing Company (“TSMC”) to design our products.

●Seek new market opportunities. We intend to supplement our internal development activities by seeking additional opportunities to acquire other businesses, product lines or technologies, or enter into strategic partnerships, that would complement our current product lines, expand the breadth of our markets, enhance our technical capabilities, or otherwise provide growth opportunities.

Customers

For our compute-in-memory associative computing solutions, we are focusing sales and marketing efforts in the markets for artificial intelligence and high-performance computing, with leading applications in natural language

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processing, computer vision and synthetic aperture radar. Our focus in this area being for similarity search acceleration in fast vector search applications and real-time mobile applications in aerospace and defense.

With the SRAM market, we are focusing our sales on network/telecom OEMs, test equipment and military/defense and aerospace with our radiation hardened and radiation tolerant product offerings.

The following is a representative list of our OEM customers that directly or indirectly purchased more than $480,000 of our SRAM products in the fiscal year ended March 31, 2025:

Airbus

BAE Systems

KYEC

Lockheed

Nokia

Northrup Grumman

Rockwell

Many of our OEM customers use contract manufacturers to assemble their equipment. Accordingly, a significant percentage of our net revenues has been derived from sales to these contract manufacturers. In addition, we sell our products to OEM customers indirectly through domestic and international distributors.

In the case of sales of our products to distributors, the decision to purchase our products is typically made by the OEM customers. In the case of contract manufacturers, OEM customers typically provide a list of approved products to the contract manufacturer, which then has discretion whether or not to purchase our products from that list.

Direct sales to contract manufacturers accounted for 7.9%, 20.5% and 19.8% of our net revenues for fiscal 2025, 2024 and 2023, respectively. Sales to foreign and domestic distributors accounted for 91.7%, 76.3% and 77.5% of our net revenues for fiscal 2025, 2024 and 2023, respectively.

The following direct customers accounted for 10% or more of our net revenues in one or more of the following periods:

Fiscal Year Ended

March 31,

2025

2024

2023

Contract manufacturer:

Flextronics Technology

2.7

%

13.5

%

10.4

%

Distributors:

Avnet Logistics

49.6

50.6

48.1

Holystone

22.6

2.5

2.4

Nexcomm

9.8

9.3

16.6

KYEC was our largest end user customer in fiscal 2025. Nokia was our largest end user customer in fiscal 2024 and 2023. KYEC purchases products through contract manufacturers and distributors. Based on information provided to us by KYEC’s contract manufacturers and distributors, purchases by KYEC represented approximately 23%, 3% and 2% of our net revenues in fiscal 2025, 2024 and 2023, respectively. Nokia purchases products directly from us and through contract manufacturers and distributors. Based on information provided to us by Nokia’s contract manufacturers and our distributors, purchases by Nokia represented approximately 12%, 21% and 17% of our net revenues in fiscal 2025, 2024 and 2023, respectively. To our knowledge, none of our other OEM customers accounted for more than 10% of our net revenues in any of these periods.

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Sales, Marketing and Technical Support

We sell our products primarily through our worldwide network of independent sales representatives and distributors. As of March 31, 2025, we employed 15 sales and marketing personnel and were supported by over 200 independent sales representatives. We believe these independent sales representatives will enable us to address an expanded customer base with the continuing introduction of our associative computing products in fiscal 2026. We believe that our relationship with our U.S. distributors, Avnet, Mouser and Digi-Key, put us in a strong position to continue to address the Very Fast SRAM memory market in the United States. We currently have regional sales offices located in Hong Kong, Israel and the United States. We believe this international coverage allows us to better serve our distributors and OEM customers by providing them with coordinated support. We believe that our customers’ purchasing decisions are based primarily on product performance, low power consumption, availability, features, quality, reliability, price, manufacturing flexibility and service. Many of our OEM customers have had long-term relationships with us based on our success in meeting these criteria.

Our sales are generally made pursuant to purchase orders received between one and twelve months prior to the scheduled delivery date. Because industry practice allows customers to reschedule or cancel orders on relatively short notice, these orders are not firm and hence we believe that backlog is not a good indicator of our future sales. We typically provide a warranty of up to 36 months on our products. Liability for a stated warranty period is usually limited to replacement of defective products.

Our marketing efforts are, first and foremost, focused on ensuring that the products we develop meet or exceed our customers’ needs. Our marketing efforts are currently focused on marketing our in-place associative computing solutions and our radiation-tolerant and radiation-hardened space grade SRAMs. Previously, those efforts were focused on defining our high-performance SRAM product roadmap. We work closely with key customers to understand their roadmaps and to ensure that the products we develop meet their requirements (primary aspects of which include functionality, performance, electrical interfaces, power, and schedule). Our marketing group also provides technical, strategic and tactical sales support to our direct sales personnel, sales representatives and distributors. This support includes in-depth product presentations, datasheets, application notes, simulation models, sales tools, marketing communications, marketing research, trademark administration and other support functions. We also engage in various marketing activities to increase brand awareness.

We emphasize customer service and technical support in an effort to provide our OEM customers with the knowledge and resources necessary to successfully use our products in their designs. Our customer service organization includes a technical team of applications engineers, technical marketing personnel and, when required, product design engineers. We provide customer support throughout the qualification and sales process and continue providing follow-up service after the sale of our products and on an ongoing basis. In addition, we provide our OEM customers with comprehensive datasheets, application notes and reference designs and access to our FPGA controller IP for use in their product development.

Manufacturing

We outsource our wafer fabrication, assembly and wafer sort testing, which enables us to focus on our design strengths, minimize fixed costs and capital expenditures and gain access to advanced manufacturing technologies. Our engineers work closely with our outsource partners to increase yields, reduce manufacturing costs, and help assure the quality of our products.

Currently, all of our SRAM and APU wafers are manufactured by TSMC under individually negotiated purchase orders. We do not currently have a long-term supply contract with our foundry, and, therefore, TSMC is not obligated to manufacture products for us for any specified period, in any specified quantity or at any specified

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price, except as may be provided in a particular purchase order. Our future success depends in part on our ability to secure sufficient capacity at TSMC or other independent foundries to supply us with the wafers we require.

Our APU products are manufactured at TSMC using 28 nanometer and 16 nanometer process technology. The majority of our current SRAM products are manufactured using 0.13 micron, 90 nanometer, 65 nanometer and 40 nanometer process technologies on 300 millimeter wafers at TSMC.

Our master die methodology enables multiple product families, and variations thereof, to be manufactured from a single mask set. As a result, based upon the way available die from a wafer are metalized, wire bonded, packaged and tested, we can create a number of different products. The manufacturing process consists of two phases, the first of which takes approximately thirteen to fifteen weeks and results in wafers that have the potential to yield multiple products within a given product family. After the completion of this phase, the wafers are stored pending customer orders. Once we receive orders for a particular product, we perform the second phase, consisting of final wafer processing, assembly, burn-in and test, which takes approximately eight to ten weeks to complete. Substrates are required in the second phase before the assembly process can begin for many of our products. This two-step manufacturing process enables us to significantly shorten our product lead times, providing flexibility for customization and to increase the availability of our products.

All of our manufactured wafers, including wafers for our APU products, are tested for electrical compliance and most are packaged at Advanced Semiconductor Engineering (“ASE”) which is located in Taiwan. Wistron Neweb Corporation in Taiwan manufactures the boards for our APU product line. Our test procedures require that all of our products be subjected to accelerated burn-in and extensive functional electrical testing which is performed at our Taiwan and U.S. test facilities. Our radiation-hardened products are assembled and tested at Silicon Turnkey Solutions Inc., located near our Sunnyvale, California headquarters facility.

Research and Development

We have devoted substantial resources in the last nine years on the development of our APU products. Our research and development staff includes engineering professionals with extensive experience in the areas of high-speed circuit design, including APU design, as well as SRAM design and systems level networking and telecommunications equipment design. Additionally, we have assembled a team of software development experts in Israel needed for the development of the various levels of software required in the use of our APU products. The design process for our products is complex. As a result, we have made substantial investments in computer-aided design and engineering resources to manage our design process.

Competition

Our existing and potential competitors include many large domestic and international companies, some of which have substantially greater resources, offer other types of memory and/or non-memory technologies and may have longer standing relationships with OEM customers than we do. Unlike us, some of our principal competitors maintain their own semiconductor fabs, which may, at times, provide them with capacity, cost and technical advantages.

Our principal competitors include NVIDIA Corporation and Intel Corporation for our in-place associative computing solutions and Infineon Technologies AG, Integrated Silicon Solution and Renesas Electronics Corporation for our SRAM products. We expect additional competitors to enter the associative computing market as well. While some of our competitors offer a broader array of products and offer some of their products at lower prices than we do, we believe that our focus on performance leadership provides us with key competitive advantages.

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We believe that our ability to compete successfully in the rapidly evolving markets for “big data” and memory products for the networking and telecommunications markets depends on a number of factors, including:

●product performance, features, including low power consumption, quality, reliability and price;

●manufacturing flexibility, product availability and customer service throughout the lifetime of the product;

●the availability of software tools, such as compilers and libraries that enable customers to easily design products for their specific needs;

●the timing and success of new product introductions by us, our customers and our competitors; and

●our ability to anticipate and conform to new industry standards.

We believe we compete favorably with our competitors based on these factors. However, we may not be able to compete successfully in the future with respect to any of these factors. Our failure to compete successfully in these or other areas could harm our business.

The market for networking memory products is competitive and is characterized by technological change and product obsolescence. Competition could increase in the future from existing competitors and from other companies that may enter our existing or future markets with solutions that may be less costly or provide higher performance or more desirable features than our products. This increased competition may result in price reductions, reduced profit margins and loss of market share.

In addition, we are vulnerable to advances in technology by competitors, including new SRAM architectures as well as new forms of Dynamic Random Access Memory (“DRAM”) and other new memory technologies. Because we have limited experience developing integrated circuit products other than Very Fast SRAMs, any efforts by us to introduce new products based on new technology, including our new in-place associative computing products, may not be successful and, as a result, our business may suffer.

Intellectual Property

Our ability to compete successfully depends, in part, upon our ability to protect our proprietary technology and information. We rely on a combination of patents, copyrights, trademarks, trade secret laws, non-disclosure and other contractual arrangements and technical measures to protect our intellectual property. We believe that it is important to maintain a large patent portfolio to protect our innovations. We currently hold 142 United States patents, including 60 memory patents and 82 associative computing patents, and have in excess of a dozen patent applications pending. We cannot assure you that any patents will be issued as a result of our pending applications. We believe that factors such as the technological and creative skills of our personnel and the success of our ongoing product development efforts are also important in maintaining our competitive position. We generally enter into confidentiality or license agreements with our employees, distributors, customers and potential customers and limit access to our proprietary information. Our intellectual property rights, if challenged, may not be upheld as valid, may not be adequate to prevent misappropriation of our technology or may not prevent the development of competitive products. Additionally, we may not be able to obtain patents or other intellectual property protection in the future. Furthermore, the laws of certain foreign countries in which our products are or may be developed, manufactured or sold, including various countries in Asia, may not protect our products or intellectual property rights to the same extent as do the laws of the United States and thus make the possibility of piracy of our technology and products more likely in these countries.

The semiconductor industry is characterized by vigorous protection and pursuit of intellectual property rights, which have resulted in significant and often protracted and expensive litigation. We or our foundry from time to

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time are notified of claims that we may be infringing patents or other intellectual property rights owned by third parties. We have been involved in patent infringement litigation in the past. We have been subject to other intellectual property claims in the past and we may be subject to additional claims and litigation in the future. Litigation by or against us relating to allegations of patent infringement or other intellectual property matters could result in significant expense to us and divert the efforts of our technical and management personnel, whether or not such litigation results in a determination favorable to us. In the event of an adverse result in any such litigation, we could be required to pay substantial damages, cease the manufacture, use and sale of infringing products, expend significant resources to develop non-infringing technology, discontinue the use of certain processes or obtain licenses to the infringing technology. Licenses may not be offered or the terms of any offered licenses may not be acceptable to us. If we fail to obtain a license from a third party for technology used by us, we could incur substantial liabilities and be required to suspend the manufacture of products or the use by our foundry of certain processes.

Human Capital Resources

As of March 31, 2025, we had 121 full-time employees, including 82 engineers, of which 47 are engaged in research and development and 32 have PhD or MS degrees, 16 employees in sales and marketing, 10 employees in general and administrative capacities and 44 employees in manufacturing. Of these employees, 40 are based in our Sunnyvale facility, 40 are based in our Taiwan facility and 33 are based in our Israel facility. We believe that our future success will depend in large part on our ability to attract and retain highly-skilled, engineering, managerial, sales and marketing personnel. Our employees are not represented by any collective bargaining unit, and we have never experienced a work stoppage. We believe that our employee relations are good.

Compensation and benefits

Our goal is to attract, motivate and retain talent with a focus on encouraging performance, promoting accountability and adhering to our company values. The future growth and success of our company largely depends on our ability to attract, train and retain qualified professionals. As part of our effort to do so, we offer competitive compensation and benefit programs including a 401(k) Plan, stock options for all employees, flexible spending accounts and paid time off. We understand that effective compensation and benefits programs are important in retaining high-performing and qualified individuals. We continue to assess our healthcare and retirement benefits each year in order to provide competitive benefits to our employees.

Inclusion and belonging

We are committed to our continued efforts to foster an inclusive work environment that supports the global workforce and the communities we serve. We recruit the best people for the job regardless of gender, ethnicity or other protected traits and it is our policy to fully comply with all laws applicable to discrimination in the workplace. Our equity and inclusion principles are also reflected in our employee training and policies. We continue to enhance our equity and inclusion policies that are guided by our executive leadership team.

Ethics & Corporate Responsibility

We are committed to ensuring ethical organizational governance, embracing inclusion in the board room and throughout the organization and are committed to observing fair, transparent, and accountable operating practices. We seek to create and foster a healthy, balanced, and ethical work environment for everyone in our organization. To this end, we promote an ethical organizational culture and encourage all employees to raise questions or concerns about actual or potential ethical issues and company policies and to offer suggestions about how we can make our organization better. These practices are set forth in our Code of Business Conduct and Ethics, which is periodically reviewed by all of our employees and is available on our website under “Corporate Governance.”

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Health and safety

We are committed to maintain a safe and healthy workplace for our employees. Our policies and practices are intended to protect our employees.

Investor Information

You can access financial and other information in the Investor Relations section of our website at www.gsitechnology.com. We make available, on our website, free of charge, copies of our annual report on Form 10-K, quarterly reports on Form 10-Q, current reports on Form 8-K, and amendments to those reports filed or furnished pursuant to Section 13(a) or 15(d) of the Exchange Act as soon as reasonably practicable after filing such material electronically or otherwise furnishing it to the SEC.

The charters of our Audit Committee, our Compensation Committee, and our Nominating and Governance Committee, our code of conduct (including code of ethics provisions that apply to our principal executive officer, principal financial officer, controller, and senior financial officers) and our corporate governance guidelines are also available at our website under “Corporate Governance.” These items are also available to any stockholder who requests them by calling (408) 331-8800. The contents of our website are not incorporated by reference in this report.

The SEC maintains an Internet site that contains reports, proxy statements and other information regarding issuers that file electronically with the SEC at www.sec.gov.

Information About Our Executive Officers

The following table sets forth certain information concerning our executive officers as of June 1, 2025:

Name

Age

Title

Lee-Lean Shu

70

President, Chief Executive Officer and Chairman

Avidan Akerib

69

Vice President, Associative Computing

Patrick Chuang

75

Senior Vice President, Memory Design

Didier Lasserre

60

Vice President, Sales

Douglas Schirle

70

Chief Financial Officer

Bor-Tay Wu

73

Vice President, Taiwan Operations

Ping Wu

68

Vice President, U.S. Operations

Lee-Lean Shu co-founded our company in March 1995 and has served as our President and Chief Executive Officer and as a member of our Board of Directors since inception. Since October 2000, Mr. Shu has also served as Chairman of our Board. From January 1995 to March 1995, Mr. Shu was Director, SRAM Design at Sony Microelectronics Corporation, a semiconductor company and a subsidiary of Sony Corporation, and from July 1990 to January 1995, he was a design manager at Sony Microelectronics Corporation.

Avidan Akerib has served as our Vice President, Associative Computing since MikaMonu Group Ltd. was acquired in November 2015. From July 2011 to November 2015, Dr. Akerib served as co-founder and chief technologist of MikaMonu Group Ltd, a developer of computer in-memory and storage technologies. From July 2008 to March 2011, Dr. Akerib served as chief scientist of ZikBit Ltd., a developer of DRAM computing technologies. From Jan 2001 to July 2007, Dr. Akerib was the General Manager of NeoMagic Israel, a supplier of low-power audio and video integrated circuits for mobile use. Dr. Akerib has a PhD in applied mathematics and computer science from the Weizmann Institute of Science, Israel, and an MSc and BSc in electrical engineering

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from Tel Aviv University and Ben Gurion University, respectively. Dr. Akerib is the inventor of more than 50 patents related to parallel and In Memory Associative Computing.

Patrick Chuang has served as our Senior Vice President, Memory Design since we acquired substantially all of the assets related to the SRAM memory device product line of Sony Corporation in July 2009. From July 1990 to July 2009, Mr. Chuang served as the Senior Vice President, Memory Design at Sony Microelectronics Corporation, a semiconductor company and a subsidiary of Sony Corporation. From 1980 to 1990, Mr. Chuang served as Design Director of NMOS DRAM at Advanced Micro Devices, a semiconductor manufacturing company.

Didier Lasserre has served as our Vice President, Sales since July 2002. From November 1997 to July 2002, Mr. Lasserre served as our Director of Sales for the Western United States and Europe. From July 1996 to October 1997, Mr. Lasserre was an account manager at Solectron Corporation, a provider of electronics manufacturing services. From June 1988 to July 1996, Mr. Lasserre was a field sales engineer at Cypress Semiconductor Corporation, a semiconductor company.

Douglas Schirle has served as our Chief Financial Officer since August 2000. From June 1999 to August 2000, Mr. Schirle served as our Corporate Controller. From March 1997 to June 1999, Mr. Schirle was the Corporate Controller at Pericom Semiconductor Corporation, a provider of digital and mixed signal integrated circuits. From November 1996 to February 1997, Mr. Schirle was Vice President, Finance for Paradigm Technology, a manufacturer of SRAMs, and from December 1993 to October 1996, he was the Controller for Paradigm Technology. Mr. Schirle was formerly a certified public accountant.

Bor-Tay Wu has served as our Vice President, Taiwan Operations since January 1997. From January 1995 to December 1996, Mr. Wu was a design manager at Atalent, an IC design company in Taiwan.

Ping Wu has served as our Vice President, U.S. Operations since September 2006. He served in the same capacity from February 2004 to April 2006. From April 2006 to August 2006, Mr. Wu was Vice President of Operations at QPixel Technology, a semiconductor company. From July 1999 to January 2004, Mr. Wu served as our Director of Operations. From July 1997 to June 1999, Mr. Wu served as Vice President of Operations at Scan Vision, a semiconductor manufacturer.