NASDAQ: SNPS

We also offer a broad and comprehensive portfolio of semiconductor IP solutions, which are pre-designed circuits that engineers use as components of larger chip designs to reduce development risk and speed time to market. Our high quality, silicon-proven semiconductor IP includes logic libraries, embedded memories, wired interface IP, memory interface IP, security IP, and embedded processors. To accelerate IP integration and silicon bring-up, our IP Accelerated initiative provides architecture design expertise, customized IP subsystems, hardening, and signal and power integrity analysis. These products and services are part of our Design IP segment.

Corporate Information

Our headquarters are located at 675 Almanor Avenue, Sunnyvale, California 94085, and our headquarters’ telephone number is (650) 584-5000. Our website is https://www.synopsys.com/. We have 189 offices worldwide.

Our Annual Report on Form 10-K, Quarterly Reports on Form 10-Q, Current Reports on Form 8-K, Proxy Statements, including those relating to our Annual Meeting of Stockholders, and any amendments to such reports or other information filed or furnished pursuant to Section 13(a) or 15(d) of the Exchange Act are available through the Investor Relations page of our website (https://investor.synopsys.com/overview/default.aspx) free of charge as soon as reasonably practicable after we file them with, or furnish them to, the SEC (www.sec.gov). We use our Investor Relations page as a routine channel for distribution of important information, including, among other things, news releases, investor presentations and financial information and to comply with our disclosure obligations under Regulation Fair Disclosure. The contents of our website are not part of this Annual Report and shall not be deemed to be incorporated by reference.

Background

In today’s era of pervasive intelligence, we have seen an acceleration in innovation cycles and a growing opportunity for Synopsys. The proliferation of silicon to power our digital world, where technology is omnipresent and interconnected, means computing is being reinvented with the rise of AI and software-defined systems. In turn, this is driving an increase in the activity of new and existing chip and system design companies around the world.

These developments are accompanied by increasing complexity. It is now common for a single chip to combine many components (processor, communications, memory, custom logic, input/output) and embedded software into a single system-on-chip (SoC), requiring highly complex chip designs. The most complex chips today contain more

3

Table of Contents

than a billion transistors. Transistors are the basic building blocks for ICs, each of which may have features that are less than 1/1,000th the diameter of a human hair.

These devices are manufactured using masks to direct beams of light onto a wafer of silicon. At such small dimensions, the wavelength of light itself can become an obstacle to production, proving too big to create such dense features and requiring creative and complicated new approaches. Designers have turned to new manufacturing techniques to solve these problems, such as multiple-patterning lithography, FinFET 3D transistors and Gate-All-Around Field-Effect transistor structures, which in turn have introduced new challenges to design and production.

The rise of silicon-powered intelligent devices and AI has increased demand for chips and systems with greater functionality and performance, reduced size and lower power consumption. Our customers, who design silicon and software-defined systems, are facing intense pressure to deliver innovative offerings in shorter timeframes and at lower prices. In other words, innovation in chip and systems design often hinges on providing products “better,” “sooner,” and “cheaper” than competitors. The design of these chips and systems is extremely complex and demands engineering solutions with a deeper integration of electronics and physics, enhanced by AI. Over the past several years, market verticals including AI, 5G, automotive and cloud computing infrastructure have contributed to the ongoing demand for our products and services. With ANSYS, Inc, (Ansys) now part of Synopsys, we can maximize the capabilities of product R&D teams broadly enabling them to rapidly innovate AI-powered products.

Our Role—As the Silicon to Systems Engineering Solutions Partner

Synopsys' silicon to systems engineering solutions are designed to help our customers—chip and system engineers and software developers—speed up time to market, achieve the highest quality of results, mitigate risk, and maximize profitability.

Chip and systems designers must determine how best to design, locate and connect the building blocks of intelligent systems, and to verify that the resulting design behaves as intended and can be manufactured efficiently and cost-effectively. This is a complex, multi-step process that is expensive and time-consuming. Our wide range of products help at different steps in the overall design process, from the design of individual ICs to the design and simulation of larger systems. Our EDA products increase designer productivity and efficiency by automating tasks, keeping track of large amounts of data, adding intelligence to the design process, facilitating reuse of past designs and reducing errors. Our S&A products give engineers the ability to explore and predict how products will work in the real world, helping them speed time-to-market, lower manufacturing costs, improve quality, and decrease risk. Our silicon IP products offer proven, high-quality pre-configured circuits that are ready to use in a chip design, saving customers time and enabling them to direct resources to features that differentiate their products. Our global service and support engineers provide expert technical support and design assistance to our customers.

Products and Services

Design Automation Segment

Our Design Automation segment includes the EDA, Ansys and Other revenue groups.

EDA

Designing ICs involves many complex steps, including, among others architecture definition, register transfer level (RTL) design, functional/RTL verification, logic design or synthesis, gate-level verification, floorplanning, place and route, and physical verification. Designers use our EDA products to accelerate and automate the chip design process, reduce errors and enable more powerful and robust designs, with improved productivity for faster time to market.

As the availability and amount of cloud-based data storage grows, customer interest in accessing EDA on the cloud is also increasing as customers seek to benefit from the scalability and flexibility that cloud computing can offer to their flows and engineering teams. Our Synopsys Cloud offering provides customers additional options for accessing our EDA products in their own cloud environments and in the industry’s first EDA Software-as-a-Service solution developed in partnership with Microsoft Azure.

Our solutions comprehensively address the design process, featuring a large number of EDA products that generally fall into the following categories:

4

Table of Contents

•Digital and custom IC design tools are used for designing and verifying complex chips, and for designing the advanced processes and models required to manufacture those chips;

•Field programmable gate array (FPGA) design, which accelerate time-to-shipping hardware with deep debug visibility, incremental design, broad language support, and optimal performance and area for FPGA-based products.

•Verification, which includes technology to verify that an IC design behaves as intended;

•Manufacturing, which includes products that both enable early manufacturing process development and convert IC design layouts into the masks used to manufacture the chips; and

•AI-driven EDA solutions, which include AI and machine learning capabilities to boost productivity and improve efficiency throughout the EDA flow.

Digital and Custom IC Design

Our Digital Design Family provides customers with a comprehensive digital design implementation solution that includes industry-leading products and redefines conventional design tool boundaries to deliver a more integrated flow than ever before, with better quality and time to results. The platform gives designers the flexibility to integrate internally developed tools as well as those from third parties. With innovative technologies, a common foundation, and flexibility, our Digital Design Family helps reduce design times, decrease uncertainties in design steps, and minimize the risks inherent in advanced, complex IC design. The platform supports advanced nodes with collaborations on next-generation process technologies.

Key design products are available as part of the Digital Design Family and include Fusion CompilerTM RTL to GDSII design implementation, Design Compiler® NXT logic synthesis, IC CompilerTM II physical design, Synopsys TestMAXTM test and diagnosis, PrimeTime® static timing analysis, PrimePowerTM power analysis, PrimeLib library characterization, StarRCTM parasitic extraction, IC ValidatorTM physical verification and 3DIC Compiler, the industry’s only unified exploration-to-signoff platform for multi-die/package co-design and co-optimization, aimed at enabling customers to integrate multiple dies in a single package.

Our Custom Design Family is a unified suite of design and verification tools that accelerates the transistor-level design of robust analog, mixed-signal, and custom-digital ICs. This product family features visually assisted layout automation, high-performance circuit simulation, reliability-aware verification, and natively integrated parasitic RC extraction and physical verification. It includes Custom CompilerTM layout and schematic editor, StarRC parasitic extraction, IC Validator physical verification and PrimeSimTM. The PrimeSim solution provides a unified workflow of next-generation simulation technologies to accelerate the design and signoff of IC designs including PrimeSim SPICE, PrimeSimPro, PrimeSim HSPICETM and PrimeSimXA. The PrimeWaveTM design environment provides comprehensive analysis and improved productivity and ease of use across all tools in PrimeSim.

Our Silicon Lifecycle Management (SLM) family of products improves silicon health and operational metrics at every phase of the device lifecycle. This family of products is built on a foundation of enriched in-chip observability, analytics and integrated automation. Synopsys' SLM in-chip monitoring enables deep insights from silicon to systems by providing meaningful data for continuous analysis and actionable feedback. The solution is integrated with the Digital Design Family for design calibration and analytics and includes Yield Explorer® for product ramp analytics, Silicon.da for AI-driven test and production analytics, TestMAX ALE (adaptive learning engine) for intelligent data extraction and communication to the SLM database and PVT IP for in-chip monitoring and sensing.

FPGA Design

FPGAs are complex chips that can be customized or programmed to perform a specific function after they are manufactured. For the process of converting a high-level hardware description language design into an FPGA netlist, a process known as FPGA-logic synthesis, we offer Synplify® FPGA synthesis tools that provide fast runtime, performance, area optimization for cost and power reduction, multi-FPGA vendor support, and incremental synthesis capabilities for faster FPGA design development.

Verification

Our Verification Family is built from our industry-leading verification technologies and provides virtual prototyping, static and formal verification, simulation, emulation, FPGA-based prototyping and debug in a unified environment with verification IP, planning, and coverage technology. By providing consistent compile, runtime and debug environments across the flow of verification tasks and by enabling seamless transitions across functions, the

5

Table of Contents

platform helps our customers accelerate chip verification, bring up software earlier, and get to market sooner with advanced SoCs.

The individual products and solutions included in the Verification Family include the following:

•VC SpyGlassTM family of static verification technologies including lint, CDC (clock domain crossing), RDC (reset domain crossing), Constraint Checking, Synopsys TestMAX Advisor, and low-power analysis and verification;

•VCS® functional verification solution, our comprehensive RTL and gate-level simulation technology, including Fine-Grained Parallelism;

•Verdi®, our next generation platform that provides AI-based SoC debug solution with an integrated development environment and advanced verification management capabilities system;

•VC FormalTM, which leverages ML-based techniques to verify complex SoC designs, find deep corner-case design bugs, and enables formal signoff for control and datapath blocks;

•ZeBu® emulation systems, which use high-performance hardware to emulate SoC designs so that designers can accelerate hardware, software and power verification of large complex SoCs and perform earlier verification and optimization of the SoC together with software;

•HAPS® FPGA-based prototyping systems, which are integrated and scalable hardware-software solutions for early software development, hardware verification and system validation of IP blocks to processor subsystems to complete SoCs, including the use of at-speed interfaces, for better performance, higher quality and faster time to market;

•VirtualizerTM virtual prototyping solution, which addresses the increasing development challenges associated with software-rich semiconductor and electronic products by accelerating both the development and deployment of virtual prototypes;

•Platform ArchitectTM solution, which provides for early analysis and optimization of multi-core SoC architectures for performance and power; and

•Other principal individual verification solutions, including the PrimeSim solution and the PrimeWave design environment.

Manufacturing

Our manufacturing solutions include Synopsys technology computer-aided design (TCAD), mask synthesis and manufacturing analytics. Synopsys TCAD enables computer-aided simulations to develop and optimize semiconductor process technologies. We also offer ProteusTM mask synthesis tools, CATS® mask data preparation software, Yield Explorer Odyssey, Yield-Manager® yield management solutions and QuantumATK® atomic-scale modeling software. Synopsys enables its customers to realize the benefits of smart manufacturing by using advanced techniques in AI/ML and large data sets. These smart manufacturing solutions are built upon Synopsys’ extensive expertise in IC design, mask synthesis, process modeling, on-chip test and monitoring techniques and cloud-based data analytics.

We also provide consulting and design services that address all phases of the SoC development process, as well as a broad range of expert training and workshops on our latest tools and methodologies.

Synopsys.ai: Synopsys' AI-Driven EDA Stack

Our EDA software stack spanning design, verification, and manufacturing is augmented with AI and machine learning through our Synopsys.aiTM suite of complementary solutions. Synopsys.ai offers industry leading AI-driven workflow optimization and data analytics solutions along with Synopsys.ai Copilot generative AI assistive and creatives capabilities, allowing engineers to accelerate and automate chip design and improve efficiency throughout the entire EDA flow.

The Synopsys.ai suite of solutions include:

•DSO.aiTM – Design Space Optimization for best quality of results and productivity with scaling of exploration design workflows;

•3DSO.aiTM – AI-driven system analysis solution for 2.5D and 3D multi-die designs that maximizes system performance and quality of results at a rapid pace;

6

Table of Contents

•VSO.aiTM – Verification Space Optimization for optimal functional verification coverage and faster turnaround time;

•TSO.aiTM – Test Space Optimization for reduced pattern count, turnaround time and higher coverage;

•ASO.aiTM – Analog Space Optimization for analog design and layout optimization and migration;

•Design.da – Design data analytics for actionable insights to unlock untapped power, performance, and area; and

•Silicon.da – Silicon data analytics for root-cause analysis and part-level traceability of failures to improve key production and silicon operational metrics.

Ansys

Synopsys’ comprehensive suite of Ansys S&A software is used by engineers–across industries–to predict and optimize how products will perform in real-world environments. The Ansys S&A portfolio spans the entire range of physics, providing access to virtually any field of engineering simulation that a design process requires, including:

•Structures – Our structural analysis product suite offers simulation tools for product design and optimization designed to increase productivity, reduce physical prototyping and help deliver better and more innovative products in less time. These tools tackle real-world analysis problems by making product development less costly and more reliable. These solutions include Ansys Mechanical™, Ansys LS-DYNA, Ansys SherlockTM and more.

•Electronics – Our electronics product suite provides electromagnetic field simulation software for designing high-performance electronic and electromechanical products. The software streamlines the design process and predicts performance of mobile communication and internet-access devices, broadband networking components and systems, ICs and printed circuit boards. It is also used in low-frequency applications such as electromechanical systems, automotive components, industrial electric motors and power electronics equipment. These solutions include Ansys High Frequency Structure Simulator (HFSS™), Ansys Maxwell, Ansys Icepak, and more.

•Fluids – Our fluids product suite enables modeling of fluid flow and other related physical phenomena. The flagship Ansys Fluent computational fluid dynamics (CFD) software package is used for simulating and analyzing the behavior of fluids (liquids and gases) and their interactions with solid structures. It is commonly employed in various industries to perform simulations that help engineers and researchers gain insights into fluid flow, heat transfer and chemical reactions and related phenomena.

•Optics, Virtual Reality (VR) and Photonics Modeling – Modeling light propagation and its impact is crucial for measuring product performance and human comfort, perception and safety. Ansys Optics™ software uniquely simulates a system's optical performance, evaluates the final illumination effect, and predicts and validates the impact of lighting and material variations on appearance and perceived quality, all in real conditions. Our photonic design and simulation tools enable customers to predict light's behavior within complex photonic structures and systems. The Ansys Lumerical™ product is a complete photonics simulation software solution that enables the design of photonics components, circuits and systems.

Ansys also provides semiconductor products including multiphysics analysis solutions that help customers create reliable and efficient designs with production-proven features including:

•RedHawk-SC™ – power noise and reliability signoff for digital IP and SoCs down to 3nm and built on cloud-native elastic compute infrastructure;

•Totem-SC™ - voltage drop and electromigration multiphysics sign-off solution for transistor-level and mixed-signal designs;

•RedHawk-SC Electrothermal™ – a multiphysics simulation platform that delivers a complete solution for analyzing multi-die chip packages and interconnects for power integrity, layout parasitic extraction, thermal profiling, thermo-mechanical stress, and signal integrity;

•PathFinder-SC™ – identifies and isolates the root causes of design issues that can cause chip failure from charged-device model (CDM), human body model (HBM), or other electrostatic discharge events;

•Exalto® – an extraction software solution that enables IC designers to accurately capture unknown crosstalk among different blocks in the design hierarchy by extracting lumped-element parasitics and generating an accurate model for electrical, magnetic and substrate coupling; and

7

Table of Contents

•VeloceRF™ – an inductive device synthesis and modeling tool that supports advanced nodes as low as 3nm and integrates with leading EDA platforms.

Other

Our Other product group includes revenue from sales of products to university programs as well as our mechatronic simulation, and the impact of gains and losses from foreign currency hedges. Our Other product group also includes revenue from Synopsys’ Optical Solutions Group through the fourth quarter of fiscal year 2025. Synopsys' Optical Solutions Group was sold to Keysight Technologies, Inc. in October 2025.

Design IP Segment

Our Design IP segment includes our Design IP solutions, which service companies primarily in the semiconductor and electronics industries.

Design IP Solutions

As functionality expands within a single chip or across a multi-die design, the number of third-party IP design blocks incorporated into these designs are rapidly increasing. We provide the broadest, most comprehensive portfolio of high-quality, silicon-proven IP solutions for SoCs. Our broad Synopsys IP portfolio includes:

•Pre-verified and silicon-proven IP solutions for widely used and emerging interfaces such as UCIe, UALink, HBM, CXL, USB, PCI Express, DDR/LPDDR, Ethernet, Ultra Ethernet, MIPI and HDMI;

•Logic libraries and embedded memories, including memory compilers, non-volatile memory, and standard cells with integrated test and repair;

•Processor solutions, including configurable ARC® processors, Neural Network processors, Digital Signal Processor cores, and software and application-specific instruction-set processor tools for embedded applications;

•Security IP solutions, including cryptographic cores and software, security subsystems, platform security and secured interface IP;

•Industry-leading IP offerings for the automotive market, optimized for strict functional safety, reliability and cybersecurity standards such as ISO 26262 and ISO 21434; and

•SoC infrastructure IP, datapath and building block IP, mathematical and floating-point components, Arm® AMBA® interconnect fabric and peripherals, and verification IP.

Our IP Accelerated initiative augments our established, broad portfolio of silicon-proven Synopsys IP with SoC architecture design support, customized IP subsystems, signal/power integrity analysis and IP hardening to accelerate our customer’s product development cycle.

This broad portfolio of IP has been optimized to address specific application requirements for the AI/data center, automotive, edge AI, digital home, Internet of things and mobile markets, enabling designers to quickly develop SoCs or multi-die designs in these areas.

Customer Service and Technical Support

A high level of customer service, support and training is critical to the adoption and successful use of our products. We provide technical support for our products through application engineering teams.

Post-contract customer support includes providing frequent updates to maintain the utilization of the software due to rapid changes in technology. Post-contract customer support includes access to a customer portal, where customers can explore our complete design knowledge database, access self-help and receive support. Updated regularly, these portals include technical documentation, design tips and answers to user questions. Customers can also engage, for additional charges, with our worldwide network of applications consultants for additional support needs.

In addition, we offer training workshops designed to increase customer design proficiency and productivity with our products. Workshops cover our EDA products and methodologies used in our design and verification flows, as well as specialized modules addressing systems design, logic design, physical design, simulation and testing. We offer

8

Table of Contents

regularly scheduled public and private courses in a variety of locations worldwide, as well as online training (live or on-demand) through our Virtual Classrooms.

Product Warranties

We generally warrant our products to be free from defects in media and to substantially conform to material specifications for a limited period of time. We also provide our customers with limited indemnification with respect to claims that their use of our software products infringes on patents, copyrights, trademarks or trade secrets. We have not experienced material warranty or indemnity claims to date.

Support for Industry Standards

We actively create and support standards that help our EDA, S&A and IP customers increase productivity, facilitate efficient design flows, improve interoperability of tools from different vendors and ensure connectivity, functionality and interoperability of IP building blocks. Standards in the electronic design and simulation industry can be established by formal accredited organizations, industry consortia, intercompany licensing, de facto usage, or through open-source licensing. Our products support multiple Application Programming Interfaces (APIs) including numerous commonly used frameworks and data and file formats.

In our Design Automation segment, our EDA products support many standards, including the many commonly used hardware description languages: SystemVerilog, Verilog, VHDL and SystemC. Our products utilize numerous industry-standard data formats, APIs and databases for the seamless exchange of design data among our tools, other EDA vendors’ products and applications that customers develop internally across design flows. For our Ansys products, we support a wide range of industry standards within our S&A portfolio to ensure usability and interconnectivity between Synopsys and third-party tools or systems. In addition to industry standards, Synopsys develops PyAnsys™, a collection of Python-based, open-source projects tailored specifically for engineers seeking to extend the capabilities of Synopsys S&A products. Developed as a collection of Python client libraries, the PyAnsys collection offers engineers a comprehensive set of tools and utilities that seamlessly integrate with Ansys software, empowering them to enhance their simulations and analyses.

In our Design IP segment, we support a wide range of industry standards within our IP product family to ensure usability and interconnectivity.

Sales and Distribution

Our EDA and Design IP customers are primarily semiconductor and electronics systems companies. Our S&A customers represent a broad spectrum of industries including high-tech, aerospace and defense (A&D), automotive, energy, industrial equipment, materials and chemicals, consumer products, healthcare and construction.

We market our products and services through direct sales in the United States and our principal foreign markets. In addition, we distribute certain of our products, including our S&A software solutions, through a global network of independent channel partners. We typically distribute our software products and documentation to customers electronically.

We maintain sales and support centers throughout the United States. Outside the United States, we maintain sales, support or service offices in Canada, multiple countries in Europe, Israel and throughout Asia, including Japan, China, Korea, India and Taiwan. Our offices are further described under Part I, Item 2, Properties of this Annual Report.

Information relating to domestic and foreign operations, including revenue and long-lived assets by geographic area, is contained in Part II, Item 8, Financial Statements and Supplementary Data of this Annual Report. Risks related to our foreign operations are described in Part I, Item 1A, Risk Factors of this Annual Report.

9

Table of Contents

Revenue Attributable to Product Groups

Revenue from our products and services is categorized into four groups:

•EDA, which includes digital and custom IC design software, verification hardware and software products, manufacturing-related design products, FPGA design software, AI driven EDA solutions and professional services;

•Design IP, which includes our interface, foundation, security, and embedded processor IP, IP subsystems, and IP implementation services;

•Ansys, which includes SoC and IC analysis and simulation solutions, solutions used to virtually test and optimize designs across various physics domains, such as structural analysis, thermal analysis, and CFD; and

•Other, which includes university programs, mechatronic simulation and the impact of gains and losses from foreign currency hedges. Our Other product group also includes revenue from Synopsys’ Optical Solutions Group through October 17, 2025, the date it was divested to Keysight Technologies, Inc.

Product Sales and Licensing Agreements

We typically license our software to customers under non-exclusive license agreements that restrict use of our software to specified purposes within specified geographical areas. The majority of licenses to our EDA products and Ansys semiconductor products are network licenses that allow a number of individual users to access the software on a defined network, including, in some cases, regional or global networks. License fees depend on the type of license, product mix, and number of copies of each product licensed. Our hardware products, which principally consist of our emulation and prototyping systems, are either sold or leased to our customers.

Our S&A software solutions are offered as subscription solutions and also as perpetual licenses. Software subscription arrangements include bundles of time-based software licenses with support services, which includes rights to technical support and software updates that are provided over the support term and are transferred to the customer over time. Perpetual license arrangements typically include a perpetual license sold with support services, which includes a stand-ready obligation to provide technical support and software updates over the support term.

We typically license Synopsys IP products under nonexclusive license agreements that provide usage rights for a specific number of designs. Fees under these licenses are typically charged on a per design basis plus, in some cases, royalties. See Note 2. Significant Accounting Policies and Bases of Presentation of the Notes to Consolidated Financial Statements in this Annual Report for further information.

Our professional services team typically provides design consulting services to our customers under consulting agreements with statements of work specific to each project.

For a full discussion of our product and service offerings, see Part  II, Item 7, Management’s Discussion and Analysis of Financial Condition and Results of Operations of this Annual Report.

Competition

Within our Design Automation segment, we compete against other EDA vendors and against our customers’ own design tools and internal design capabilities. The EDA industry is highly competitive. In general, we compete principally on technology leadership, product quality and features (including ease-of-use), license terms, price and payment terms, post-contract customer support, flexibility of tool use, and interoperability with our own and other vendors’ products. We also deliver a significant amount of engineering and design consulting for our products. No single factor drives an EDA customer’s buying decision, and we compete on all fronts to capture a higher portion of our customers’ budgets. We compete with a variety of different EDA vendors, including publicly traded companies offering varying ranges of products and services as well as other EDA vendors that offer products focused on one or more discrete phases of the IC design process. Additionally, some of our customers internally develop design tools and capabilities that compete with our products. For our Ansys S&A software solutions, our competitors include publicly traded companies, small, geographically-focused firms, startups, and solutions produced in-house by the end users.

Within our Design IP segment, Synopsys competes against numerous other IP providers and our customers' internally developed IP. We generally compete on the basis of product quality, reliability, features, availability of titles for new manufacturing processes, ease of integration with customer designs, compatibility with design tools, license

10

Table of Contents

terms, price and payment terms, and customer support. Likewise, no single factor drives an IP customer’s buying decision, and we compete on all fronts to capture a higher portion of our customers’ budgets.

Risks related to competitive factors affecting our business are described in Part I, Item 1A, Risk Factors of this Annual Report.

Proprietary Rights

We primarily rely upon a combination of copyright, patent, trademark, and trade secret laws and license and non-disclosure agreements to establish and protect our proprietary rights. We have a diversified portfolio of more than 3,800 United States and foreign patents issued, and we will continue to pursue additional patents in the future. Our issued patents have expiration dates through 2044 and generally have a term of 20 years from filing. Our patents primarily relate to our products and the technology used in connection with our products. Our source code is protected both as a trade secret and as an unpublished copyrighted work. However, third parties may independently develop similar technology. In addition, effective copyright and trade secret protection may be unavailable or limited in some foreign countries in which we operate. While protecting our proprietary technology is important, our business as a whole is not significantly dependent upon any single patent, copyright, trademark, or license.

In many cases, under our customer agreements and other license agreements, we offer to indemnify our customers if the licensed products infringe on a third party’s intellectual property rights. As a result, we may from time to time need to defend claims that our customers’ use of our products infringes on these third-party rights. We license software and other intellectual property from third parties, including, in several instances, for inclusion in our products. Risks related to our use of third-party technology are described in Part I, Item 1A, Risk Factors of this Annual Report.

Responsible Business Matters

At Synopsys, we recognize that as we drive innovation and business success in the era of pervasive intelligence, we are simultaneously responsible for the sustainability of our operations, products and ecosystem, which may impact our long-term value as a company.

Our Responsible Business program at Synopsys provides a focus and structure for how we address both our own operational impact on the world and our ability to influence others around us. For example, Synopsys is driving energy savings in the semiconductor ecosystem through solutions that optimize energy efficiency in the design and use of chips and systems, along with solutions that reduce energy use, water use, and waste generation in semiconductor manufacturing. With the addition of our Ansys business, we now offer expanded capabilities that help customers model, predict, and improve product performance and sustainability across a broader range of industries. Together, these solutions enable more efficient design cycles, reduce physical prototyping, and support the development of energy-efficient, AI-enabled systems, further amplifying our impact on responsible innovation.

We maintain a robust governance structure for our Responsible Business program, gauging and acting on our highest priority responsible business impacts, business risks, and opportunities, as we believe this creates positive impact for our stockholders as well as our customers, employees, partners, and local communities.

Human Capital Resources

Synopsys’ mission is to empower innovators to drive human advancement, and we believe our people are the key to our success. Our People and Places team, led by our Chief People Officer, focuses on building a vibrant workplace culture where talent around the globe can learn, grow, and bring their best selves to work. Our people strategy is built around five key pillars: Drive Performance, Inspire Leaders and Teams, Foster Learning and Growth, Transform Experiences and Engagement, and Accelerate Next Gen Synopsys. To help employees thrive, we offer opportunities for learning and growth, tools for collaboration and innovation, respectful work environments, and comprehensive total rewards. We believe these efforts create value for our stockholders, customers and employees.

As of fiscal 2025 year-end, Synopsys had approximately 28,000 employees, with about 23% in the United States and 77% in other locations worldwide. Approximately 75% of our employees are engineers, and over half hold Master's or PhD degrees. We focus on several human capital measures and objectives, including recruitment and retention; opportunity and community; total rewards; employee health, safety, and well-being; employee engagement; and talent development and succession planning. Risks related to our human capital are described in Part I, Item 1A, Risk Factors of this Annual Report.

Recruitment and Retention

11

Table of Contents

In fiscal 2025, our total employee headcount grew by approximately 40% primarily as a result of the Ansys Merger. As of our fiscal 2025 year-end, our voluntary turnover rate was 5.7%. We attribute the strong retention of our talented workforce to several factors, including exciting and challenging assignments; growth opportunities; strong leadership and management; a culture grounded in our core values of Agility, Courage, Excellence, and Trust; competitive and equitable compensation and benefits; our leading products and technology; and the strength of our customer relationships.

Opportunity and Community

Our success depends on the more than 28,000 extraordinary professionals who make up our workforce across 30-plus countries. Our efforts to create a great work environment at Synopsys span every part of the employee experience, from attracting and retaining talent to fostering a culture of collaboration. We strive for people practices that are fair for all and regularly review and improve talent management processes, including those in hiring, compensation, talent development, and promotions. We also offer programs and events globally to help our employees learn about each other, foster connections, and collaborate.

Total Rewards

Our Total Rewards program provides meaningful global benefits, compensation, and recognition for the time, energy, commitment, skills, and expertise employees bring to Synopsys every day. For eligible employees, benefits may include:

•Market-competitive salary and cash bonus opportunities;

•Equity compensation;

•Robust medical, dental, vision, and wellness benefits;

•Employee Assistance Program (EAP);

•Comprehensive leave plans;

•Life insurance options;

•Retirement plans;

•Financial planning tools;

•Student loan repayment assistance;

•Well-being and family support; and

•Parental and elder care resources.

Health, Safety, and Well-being

Our commitment to health, safety, and wellness is underscored by resources that help employees thrive in a hybrid work environment and balance work and personal life. Our Synopsys Wellbeing campaign encourages leaders and managers to model healthy behaviors and create opportunities for team wellness activities. We also offer a variety of programs and resources at no cost to employees and their families to support their mental, emotional, and financial well-being.

Employee Engagement

We maintain a comprehensive employee feedback program to understand the employee experience and make improvements in areas such as customer interaction and knowledge sharing. Through our annual SHAPE Synopsys survey, we gather employee insights on values, manager effectiveness, innovation, belonging, and other critical factors. We also use pulse surveys to provide space for conversations about identity, direction, and connection.

In October 2025, approximately 95% of our employees participated in the SHAPE survey. We received an engagement score of 81, which was calculated by averaging favorable responses to job satisfaction questions. In fiscal 2025, Synopsys received more than 90 workplace and culture awards, including Great Place to Work certification in 14 countries and recognition from Newsweek, Forbes, Fortune, U.S. News & World Report, Comparably, and The Wall Street Journal. These results demonstrate Synopsys' stability and resiliency and the fact that we have a highly engaged global workforce. Employees reported strong excitement for the company's future, trust in leadership, a sense of belonging, and personal investment in our mission.

To promote employee engagement and recognition, we invest in programs such as the annual Engineering and Innovation Conference and Pitch Fest innovation contest. As we grow, we aspire to maintain our results-oriented

12

Table of Contents

culture by balancing productivity with smart investments in our employees’ development, while also supporting individual well-being. These are two key drivers of the overall employee experience.

We believe strong individual and business performance stems from engaged employees who have clarity on goals, receive regular feedback, and have opportunities to grow. Building on our commitment to development, our enhanced performance process deepens the connection between individual objectives and key results, our values, and overall company outcomes. This is an agile performance process that drives transparency through continuous feedback and quarterly goal alignment conversations. These efforts are supported by the implementation of a new AI-powered performance management platform.

Talent Development and Succession Planning

We offer programs to support career advancement, including a digital learning platform that fosters a “curious learning” culture with access to training, articles, videos, and blogs. We also host in-person and on-demand learning sessions designed to build capabilities and adaptability required for the future. As employees advance in their careers, our training framework is intended to develop new technical skills and core competencies.

Our management training focuses on communication, engagement, coaching, hiring, and key business skills. This is based on our belief that employees should work for and with great managers and leaders. The training aims to promote an ethical and supportive work environment that is free from bias and harassment. In fiscal 2025, we introduced courses to help managers lead through change and become effective coaches. Regions and business teams also customize development programs for their specific demographics.

13

Table of Contents

Information about our Executive Officers

The executive officers of Synopsys and their ages as of December 19, 2025 were as follows:

Name
Age

Position

Sassine Ghazi
55
President and Chief Executive Officer

Aart J. de Geus71
Executive Chair of the Board of Directors

Shelagh Glaser61Chief Financial Officer

Mike Ellow
62
Chief Revenue Officer

Janet Lee
62General Counsel and Corporate Secretary

Sassine Ghazi has served as our Chief Executive Officer since January 2024, became our President in November 2021 and joined our Board of Directors in August 2023. Prior to his appointment as Chief Executive Officer, he served as Chief Operating Officer from August 2020 to January 2024. Mr. Ghazi joined Synopsys in March 1998 as an applications engineer and held a series of sales positions with increasing responsibility, culminating in leadership of worldwide strategic accounts. Prior to his appointment as Chief Operating Officer, Mr. Ghazi was the general manager for all digital and custom products, the largest business group in Synopsys. Prior to joining Synopsys, Mr. Ghazi was a design engineer at Intel Corporation. Mr. Ghazi received his bachelor’s degree in Business Administration from Lebanese American University; a B.S.E.E from the Georgia Institute of Technology in 1993; and an M.S.E.E. from the University of Tennessee in 1995.

Aart J. de Geus co-founded Synopsys and served as a member of our Board of Directors since our inception and as Chair of our Board of Directors from 1986 to 1992 and from 1998 until his transition to Executive Chair of our Board of Directors in January 2024. He served as Chief Executive Officer from 1994 to 2012 and as Co-Chief Executive Officer with Dr. Chi-Foon Chan from May 2012 until April 2022, and Chief Executive Officer from April 2022 until January 2024. Since the inception of Synopsys in December 1986, Dr. de Geus has held a variety of positions, including President, Senior Vice President of Engineering and Senior Vice President of Marketing. Dr. de Geus has also served on the board of directors of Applied Materials, Inc. since July 2007. Dr. de Geus holds an M.S.E.E. from the Swiss Federal Institute of Technology in Lausanne, Switzerland and a Ph.D. in Electrical Engineering from Southern Methodist University.

Shelagh Glaser has served as our Chief Financial Officer since December 2022. Prior to joining Synopsys, Ms. Glaser served as Chief Financial Officer of Zendesk, Inc. from May 2021 to November 2022. Ms. Glaser previously served in senior finance roles at Intel Corporation, a multinational technology company, including serving as its Corporate Vice President and Chief Financial Officer and Chief Operating Officer for its Data Platform Group from July 2019 to May 2021 and serving as its Corporate Vice President and Chief Financial Officer and in various other senior roles in its Client Computing Group from December 2013 to July 2019. Ms. Glaser has served as a director and member of the Audit Committee at PubMatic, Inc. since June 2022. Ms. Glaser holds a B.A. in Economics from the University of Michigan and an M.B.A. in Finance from Carnegie Mellon University.

Mike Ellow has served as our Chief Revenue Officer since November 2025. Prior to joining Synopsys, Mr. Ellow was the Chief Executive Officer of Siemens EDA, a business unit of Siemens Digital Industries, from June 2024 to November 2025. Prior to becoming the Chief Executive Officer of Siemens EDA, he was the Executive Vice President, EDA Global Sales, Services and Customer Support from January 2021 to June 2024. He has also held various leadership roles in sales and customer support, starting at Berkeley Design Automation in 2011 and through Mentor Graphics' acquisition by Siemens Digital Industries Software. He started his career in sales at Cadence Design Systems in 1997, where he held various leadership roles until 2010. Mr. Ellow holds a B.S.E.E. from Lehigh University, an M.S.E.E. from the University of Southern California, and an M.B.A. from California State University, Fullerton.

Janet Lee has served as our General Counsel and Corporate Secretary since July 2025. From June 2023 to July 2025, she was Senior Vice President, General Counsel and Secretary of ANSYS, Inc. She served as Vice President, General Counsel and Secretary at ANSYS, Inc. from June 2017 to June 2023. Previously, Ms. Lee was Vice President of Legal and Intellectual Property at HERE North America and Director of Legal and IP at Nokia Research Center. Ms. Lee holds a Bachelor of Arts from the University of Michigan, a Master of Arts from Harvard University and a Juris Doctorate from Stanford Law School.

There are no family relationships among any Synopsys executive officers or directors, or any arrangement or understanding pursuant to which any person was selected as an officer.

14

Table of Contents